Characterization of a 12-bit pipeline analog to digital converter

This thesis presents the characterization of the 12-bit pipeline analog-to-digital converter (ADC) designed by Mark Hale, Ph.D. graduate from the University of Tennessee. An overview of the pipeline ADC architecture is discussed first, and then the specifics of the testing procedure and results are detailed. The differential nonlinearity (DNL), integral nonlinearity (INL), DC offset error, and gain error for the pipeline ADC are the DC characteristics of interest. The DC characterization was performed in order to analyze the linearity of the ADC output over the analog input range. Additionally, the DNL and INL results were used to determine if the ADC exhibited undesirable effects, such as missed codes. The characterization was performed at room temperature using differential sinusoidal inputs. Labview was utilized to efficiently gather the digital output levels of the ADC, and Matlab was employed to compute the characteristics of the tested ADC. During the testing process several difficulties were encountered. Characterization results were negatively impacted by the presence of noise both at the output of the sample-and-hold and on the supply rails. Through iterative testing, the results improved. However, the effective number of bits for the tested ADC did not attain the desired 12-bits

Accepted for the Council:

First, I would like to thank my entire family for their unwavering support during my academic endeavors. The financial support they provided has enabled me to focus solely on my studies, both for my Bachelor of Science and Master of Science degrees in Electrical Engineering at the University of Tennessee in Knoxville, TN. Additionally, I would like to thank my family for their emotional support and encouragement, which has motivated me to strive beyond any success I would have achieved alone. I would also like to thank my major professor and advisor Dr. Benjamin J. Blalock for both his excellent instruction in the classroom, assistance in the determination of my thesis topic, and for the use of his laboratory equipment. I would also like to express my appreciation to the other two professors on my committee, Dr. Syed K. Islam and Dr. Leon M. Tolbert, for their time and assistance. Finally, I would like to thank Mark Hale for designing the 12-Bit pipeline ADC and aiding in the testing process via continued electronic correspondence. I would also like to express my appreciation to Ross Chun for designing the test board utilized in my research